Sunday, July 8, 2012

CS 9204 -COMPUTER ARCHITECTURE-B.E -CSE-COMPUTER SCIENCE AND ENGINEERING THIRD -III SEMESTER 2008 REGULATION ANNA UNIVERSITY SYLLABUS



CSE Computer Science And Engineering III -third Semester Syllabus 2008 Regulation Anna University


AIM:
To understand the organization of a computer, and the hardware-software interface.

OBJECTIVES:
·    To know about the various components of a computer and their internals.
·    To comprehend the importance of the hardware-software interface, and instruction- set architecture.
·    To understand the architectural features of superscalar processors.

UNIT I           BASIC STRUCTURE OF COMPUTERS                                                9+3
Functional units Basic operational concepts – Bus structures Performance and metrics Instructions and instruction sequencing Hardware Software Interface Instruction set architecture Addressing modes RISC CISC - ALU design Fixed point and floating point operations.

UNIT II          BASIC PROCESSING UNIT                                                                   6+3
Fundamental concepts Execution of a complete instruction Multiple bus organization
Hardwired control – Micro programmed control Nano programming.

UNIT III         PIPELINING AND ILP                                                                           12+3
Basic concepts Data hazards Instruction hazards Influence on instruction sets Data  path  and  control  considerations  –    Performance  considerations   Exception handling Advanced concepts in pipelining Exploitation of more ILP Hardware and software approaches Dynamic scheduling Speculation Compiler approaches Multiple issue processors.


UNIT IV        MEMORY SYSTEM                                                                                 9+3
Basic concepts Semiconductor RAM ROM – Speed Size and cost –    Cache memories Improving cache performance Virtual memory – Memory management requirements Associative memories Secondary storage devices.

UNIT V         I/O ORGANIZATION                                                                               9+3
Accessing I/O devices Programmed Input/Output -Interrupts Direct Memory Access
Buses – Interface circuits Standard I/O Interfaces (PCI, SCSI, USB), I/O devices and processors.




TEXT BOOKS:


L: 45, T: 15, TOTAL = 60 PERIODS


1.  Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization, Fifth
Edition, Tata McGraw Hill, 2002.
2.  David A. Patterson and John L. Hennessy, “Computer Organization and Design: The
Hardware/Software interface, Third Edition, Elsevier, 2005.

REFERENCES:
1.  Willia Stallings “Computer  Organizatio an Architectur –   Designin for
Performance, Sixth Edition, Pearson Education, 2003.
2.  John  P.  Hayes,  “Computer  Architecture  and  Organization,  Third  Edition,  Tata
McGraw Hill, 1998.
3.  V.P. Heuring, H.F. Jordan, “Computer Systems Design and Architecture, Second
Edition, Pearson Education, 2004.
4.  Behrooz Parhami, Computer Architecture, Oxford University Press, 2007.

7/08/2012 12:20:00 AM

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